Higher switching frequencies, improved accuracy and stability, and better hardware efficiency than ever before

Power electronics simulation is a vital aspect of the RTDS Simulator, with users worldwide performing closed-loop testing on various aspects of converter controls in order to validate behaviour prior to deployment on the grid. The RTDS Simulator must therefore provide a high-fidelity electromagnetic transient representation of all aspects of power electronics-based systems in real time. The approach that has been taken to do so has changed over time with the availability of processing hardware and research in converter simulation.


The release of the innovative, proprietary Universal Converter Model (UCM) in 2021 has significantly improved the accuracy, flexibility, and accessibility of real time power electronics simulation.

An AVR is connected to the RTDS Simulator for hardware-in-the-loop testing: one of many power electronics applications that will benefit from the UCM

The evolution of converter simulation with the RTDS Simulator

The RTDS Simulator was originally developed for the closed-loop testing of HVDC controls in the late 1980s, so the representation of line commutated converter (LCC) valves was central to its capabilities. In 2005, the simulation of voltage source converters (VSCs) at timesteps of 1.4 – 3.75 µs was made possible by advances in processing technology, and the RTDS Simulator’s Small Timestep environment was introduced. The Small Timestep allows for freely configurable power electronics simulation running on a dedicated processor in parallel to the main simulation. This is generally achieved via the L/C discrete circuits switching method (“L/C switching”), which is an established approach to representing changes in switching state without requiring refactorization of the network admittance matrix in each small timestep. However, there are challenges to this approach:

  • It is well known that the L/C switching method causes artificial switching losses associated with abruptly switching from a small inductor (switch ON) to a small capacitor (switch OFF) model. At switching rates in excess of 3-5 kHz, these artificial losses render the model inaccurate.
  • The L/C representation can introduce current and voltage oscillation that can appear as noise on the output waveforms.
  • The impedance of the switch is frequency dependent, which limits its operational bandwidth. This places a limitation on the timestep – it must be lower than 3.75 µs in order to ensure that that the ON/OFF impedance ratio is sufficiently large.

To address these issues, resistively-switched converter models are also available in the Small Timestep, but they are decoupled from the surrounding network via a travelling wave interface, and matrix refactorization for all possible switching states are pre-calculated and stored before the simulation case is run. The resistively-switched models are not subject to the same switching frequency maximums as the L/C switched models, but this approach also has its drawbacks:

  • If parameters are not selected properly, the interface transmission line adds series inductance and shunt capacitance to the system, which can cause noise and oscillation.
  • Due to memory limitations, there is a very limited number of switches that can be represented resistively.

The Small Timestep environment was used successfully for many years by leading developers, manufacturers, and implementers of power electronic controls who use the RTDS Simulator for closed-loop testing.

The RTDS Simulator has two power electronics-related firmwares that run on the GTFPGA Unit: the Generic Power Electronics Solver (GPES) or custom-topology converter simulation in the hundreds of nanoseconds timestep range, which uses the L/C switching approach described above, and our detailed Modular Multilevel Converter (MMC) valve models. The GTFPGA Unit is interfaced to the main processing hardware via a fibre cable.

NovaCor and the Substep environment

NovaCor, the current RTDS Simulator hardware generation, is based on a powerful multicore processor which represents a major increase in processing capability for the Simulator. NovaCor uses a core licensing structure to create scalability in simulation power.

In 2019, the Substep environment was introduced. Running in parallel with the Mainstep environment simulation, but at an integer fraction of its timestep, the Substep environment features full matrix decomposition in each timestep. It was developed with power electronics in mind, and many components have been specially designed to run efficiently at a lower timestep within it, but it is also extremely flexible, supporting almost all of the library components from the Mainstep environment. Our proprietary Predictive Switching Algorithm, detailed in this technical paper, allows for resistively switched converter simulation in the Substep environment – without requiring a travelling wave interface between the converter and the surrounding network.

The resistively-switched Substep converter models allow for accurate representation of switching in the 30-50 kHz range. They don’t suffer from the limited operational bandwidth of the L/C switched models, and Substep circuits can be run at up to 10 µs. Each Substep subnetwork can include up to 60 nodes, and requires a dedicated core.

Comparison of L/C switched vs. resistively switched converter model performance – artificial switching losses and noise on waveforms due to oscillations within the discrete circuit

Average value models

Average value models, which are essentially a controlled voltage or current source, can be used to accurately represent the power profile of a converter without simulating the full switching behaviour. Average models utilize the same control strategies and signals as fully-switched models, down to the modulation waveform. They cannot be used to test controls at the firing pulse level for PWM schemes, for example. Average value models typically run in the Mainstep environment, at the normal timestep of 25 to 50 µs, and therefore have a lighter computational burden. These models are ideal when there is a limited quantity of simulation hardware and the user isn’t interested in the high frequency switching dynamics or low-level controller testing.

Average value models may be decoupled at the DC bus, which can cause stability issues. Also, characteristic converter harmonics are not represented when using an average model.

The unique advantages of the UCM

The RTDS Simulator’s UCM is a significant development in the field of real-time power electronics simulation. It overcomes many of the challenges associated with the various other modelling approaches used by the RTDS Simulator (described in the above sections) and other real-time simulation tools.

The UCM based on a Descriptor State-Space modelling approach, which allows both sides of the converter to be represented by controlled sources with no delay introduced between them. The UCM is not decoupled at the DC bus, with no numerical interface between the converter model and surrounding network. The result is improved numerical stability. The UCM utilizes the same predictive switching technique that the Substep resistive switching converter models are based on, so it maintains the accurate and clean performance of those models.

The UCM is currently available for the following fixed converter topologies: two-level, NPC and T-type three-level, boost, and buck.

Back-to-back 2-level UCM implementation with a PMSM for a wind turbine simulation case (Substep environment)

The UCM also considers both blocked and deblocked modes, so users can now more precisely model the charging and discharging of their circuit. The UCM represents the transition between blocked and deblocked states with improved accuracy and smoothness.

The UCM has three input options:

  • Modulation Waveform – Available in both Substep and Mainstep environments, for a wide range of timesteps. The valve model receives a sin wave for modulation, and the result is similar to our existing average value models, with some performance improvements.
  • Firing Pulse – Available only at timesteps under 10 µs. The valve model reads firing pulses once per timestep, and the result is similar to our existing resistively-switched Substep converter models.
  • Improved Firing – Available in both Substep and Mainstep environments, for a wide range of timesteps. Improved Firing captures firing pulses (from an external controller or firing pulse generator within the simulation) at a very high resolution and calculates the portion of each timestep that the valve’s switches should be ‘on’. This effectively allows for multiple on/off transitions within each timestep. This new, proprietary algorithm offers significantly improved performance from our previous models and other real-time converter models in the industry, both in terms of the switching frequency that can be represented at a given timestep, and in terms of accuracy. Production of non-characteristic harmonics are significantly reduced using the Improved Firing feature.

With Improved Firing, the UCM can accurately represent:

  Switching at >100 kHz in the Substep environment
•  Switching at 10 kHz in the Mainstep environment

Using the Improved Firing input, the performance of the UCM is equivalent to that of offline electromagnetic transient program models (such as those available in the PSCAD software), which can take advantage of interpolation techniques. This is a milestone for real-time simulators, which are subject to much more stringent demands on calculation speed and efficiency due to the real-time requirement.

UCM model performance – comparing regular firing pulse and Improved Firing inputs in the Substep environment, and modulation input in the Mainstep environment

The unique advantages of the UCM (particularly with Improved Firing) have tangible benefits for RTDS Simulator users. The ability to represent converter performance with PWM firing at over 100 kHz – without compromising stability or accuracy, which can occur when a decoupled approach or L/C switching are used – sets a new industry standard for hardware-in-the-loop testing for converter controls. 

Additionally, users with more limited simulator hardware configurations will now have significantly improved opportunities for power electronics simulation and testing. When used in the Mainstep environment, the UCM requires only 10 load units, making it computationally light. Several UCM components could easily be represented using a NovaCor system with a single licensed core, meaning that entry-level simulators are now capable of running power electronics studies and closed-loop testing of converter controls in a more detailed way than ever before – with full switching represented in the 10 kHz range. 

Sample cases involving the UCM are now available in RSCAD V5.014 and RSCAD FX (V1.0 and up). For more information, please email marketing@rtds.com.

Did you miss our recent webinar and demonstration on the UCM?
Don’t worry – it’s available on demand and you can view it by registering here:

Webinar and Demo: The New Universal Converter Model — A Revolution in Real-Time Power Electronics Simulation