DITS Specifications
provides time stamp information for the arrival of digital input signals within a time step
provides optical isolation for six incoming digital signals
used with improved firing algorithm, critical to power electronic simulations (ie: HVDC, SVC, TCSC)
increases the firing resolution to better than 2 microseconds
input level up to ~100 V can easily be accommodated, by inserting a current limiting resistor in series with the opto-isolator
rail-mounted in the rear of the cubicle
connects via ribbon cable to the digital port at the rear of the 3PC
signal selection in RSCAD/Draft
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